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Freescale Semiconductor /MKL28T7_CORE1 /USB0 /USBTRC0

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Interpret as USBTRC0

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7 43 0 0 00 0 0 0 0 0 0 0 0 (0)USB_RESUME_INT 0 (0)SYNC_DET 0 (USB_CLK_RECOVERY_INT)USB_CLK_RECOVERY_INT 0 (0)VREDG_DET 0 (0)VFEDG_DET 0 (0)USBRESMEN 0 (0)USBRESET

USB_RESUME_INT=0, VREDG_DET=0, USBRESMEN=0, USBRESET=0, SYNC_DET=0, VFEDG_DET=0

Description

USB Transceiver Control register 0

Fields

USB_RESUME_INT

USB Asynchronous Interrupt

0 (0): No interrupt was generated.

1 (1): Interrupt was generated because of the USB asynchronous interrupt.
SYNC_DET

Synchronous USB Interrupt Detect

0 (0): Synchronous interrupt has not been detected.

1 (1): Synchronous interrupt has been detected.
USB_CLK_RECOVERY_INT

Combined USB Clock Recovery interrupt status
VREDG_DET

VREGIN Rising Edge Interrupt Detect

0 (0): VREGIN rising edge interrupt has not been detected.

1 (1): VREGIN rising edge interrupt has been detected.
VFEDG_DET

VREGIN Falling Edge Interrupt Detect

0 (0): VREGIN falling edge interrupt has not been detected.

1 (1): VREGIN falling edge interrupt has been detected.
USBRESMEN

Asynchronous Resume Interrupt Enable

0 (0): USB asynchronous wakeup from suspend mode disabled.

1 (1): USB asynchronous wakeup from suspend mode enabled. The asynchronous resume interrupt differs from the synchronous resume interrupt in that it asynchronously detects K-state using the unfiltered state of the D+ and D- pins. This interrupt should only be enabled when the Transceiver is suspended.
USBRESET

USB Reset

0 (0): Normal USB module operation.

1 (1): Returns the USB module to its reset state.

Links

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Register License

Redistribution and use in source and binary forms, with or without modification,\nare permitted provided that the following conditions are met:\n o Redistributions of source code must retain the above copyright notice, this list\n of conditions and the following disclaimer.\n o Redistributions in binary form must reproduce the above copyright notice, this\n list of conditions and the following disclaimer in the documentation and/or\n other materials provided with the distribution.\n o Neither the name of Freescale Semiconductor, Inc. nor the names of its\n contributors may be used to endorse or promote products derived from this\n software without specific prior written permission.\n THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS “AS IS” AND\n ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\n WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\n DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR\n ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\n (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON\n ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\n SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data